Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
1999-03-31
2002-07-23
Lee, Thomas (Department: 2185)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
C710S062000
Reexamination Certificate
active
06425079
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to the field of computing technology and more particularly concerns the initialization routine, or boot sequence, of a computer system which prepares the system for loading an operating system.
2. Description of the Related Art
During a computer system's initialization routine, commonly referred to as a boot sequence, a variety of diagnostics are performed by the computer system to ascertain the availability and status of hardware devices and ensure proper operation of components. During initialization, a program counter informs the central processing unit (CPU) of the address of the next instruction needed for processing. Here the address is the beginning of a boot program permanently stored in a set of ROM chips that comprise part of the system BIOS and contain the computer's basic input/output system (BIOS).
Upon execution of system BIOS, the boot program invokes a series of system checks to ascertain the location, number and identity of various devices associated with the computer system. To accomplish this, the CPU transmits signals over buses to the motherboard's various expansion slots to ensure their associated adapter cards are functioning properly. While the predominant type of expansion slot employed today utilizes either the peripheral component interconnect (PCI) or the newer accelerated graphics port (AGP), other types of buses including video electronics standards association local bus (VL-BUS), industry standard architecture (ISA) and extended industry standard architecture (EISA) are also employed to a lesser extent. Residing within the respective expansion slots may be a variety of adapter cards which may include, by way of example only, a network adapter card, a SCSI card or other similar device.
Also associated with these adapters, such as adapter card
80
in prior art
FIG. 1
, is a firmware code known as the option ROM BIOS. The adapter's option ROM BIOS chip
70
includes an associated BIOS image
72
which is in part characterized by a specific PCI device ID
74
located in the BIOS image's PCI header structure
76
. This PCI device ID
74
is intended to match the unique identification of the PCI device chip
90
on the adapter card
80
with which option ROM BIOS chip
70
communicates. During the initialization routine, it is necessary to incorporate each adapter's option ROM BIOS into the system RAM as part of the computer system's overall BIOS and memory configuration. To this end, the system BIOS
22
residing on the motherboard
40
communicates, via the PCI bus
26
, with the adapter's option ROM BIOS chip
70
to determine if a PCI device ID match exists between it and the associated PCI device chip
90
. If a match does not exist, then system BIOS
22
will not permit execution of the option ROM BIOS—i.e. it will ignore it and not load it into the system's overall BIOS and memory configuration.
In the past, the BIOS image associated with each option ROM BIOS chip only stores one PCI device ID in the PCI header Structure. However, as more and more PCI device chips are released by manufacturers, each chip requires a unique PCI device ID and, thus, its own BIOS image in the associated option ROM BIOS chip. Thus, it becomes necessary to keep track of these different BIOS images because, unless a match exists between the PCI device ID and the associated PCI device chip, no communication can take place with the option ROM BIOS chip. The importance and difficulty of keeping track of these different BIOS images is further complicated by the fact that there exists different families of adapters, each with different versions of PCI device chips. These families include, for example, SCSI controllers, RAID controllers, processors and bridges.
While the proliferation of these PCI device chips is primarily a problem for the manufacture and its tech support, the user might also encounter a compatibility problem from time to time. For example, if it is determined that a compatibility does not exist between the PCI device chip and its associated PCI device ID residing on the adapter card's option ROM BIOS chip, then the user might attempt to rectify the problem by using a flash utility program whereby the user flashes a new BIOS image onto the option ROM BIOS chip. This option is available today given that newer computer systems store the BIOS on flash ROMs, namely EEPROMs, which can be erased and rewritten if the user needs to update the BIOS program. However, in the event the user inadvertently flashes the wrong BIOS image, this results in a tech support issue for the manufacturer in order to rectify the problem. This of course increases the cost of the product for the manufacturer.
As illustrated in prior art
FIG. 2
, the user might also encounter this compatibility problem where the PCI device chip of interest
90
′ resides on the computer system's motherboard
40
′, as opposed to its adapter card
80
′. For example, the ARO-
1130
controller manufactured by Adaptec, Inc. of Milpitas, Calif., is a RAID adapter card that does not have a SCSI chip physically residing on the card. Instead, the ARO-
1130
plugs into a specific motherboard provided with the appropriate SCSI chip. The option ROM BIOS chip
70
′, though, does reside on the ARO adapter card and becomes physically connected to the SCSI chip through the PCI bus. Provided the user employs the appropriate motherboard, there is no compatibility problem between the SCSI chip on the motherboard and its associated PCI device ID residing in the BIOS image of the adapter card's option ROM Bios chip. However, were the user to employ a different motherboard having a different SCSI chip, and therefore a different PCI device ID, then the problem arises. Again, this problem generates a tech support call because the user must update the option ROM BIOS on the adapter card which is typically accomplished by downloading a flash utility from the manufacturer capable of detecting the SCSI chip on the motherboard and flashing its corresponding BIOS.
In view of the foregoing, what is needed is a new and improved approach for optimizing the versatility of option ROM BIOS chips to accommodate different families of PCI device chips irrespective of the number of different versions of PCI device chips within each family. Such a solution would benefit the manufacturing side of operations through cost savings, time savings, etc., and also benefit the research and development side by avoiding confusion in the compatibility testing process. The appropriate solution would also benefit the user who would no longer even encounter such a compatibility problem.
SUMMARY OF THE INVENTION
The present invention fills these needs by providing a new and useful boot sequence adapted for use with a computer system during execution of the system BIOS to ensure compatibility between an option ROM BIOS chip and a chip of interest with which the option ROM BIOS chip is intended to communicate during the initial operation of the computer system. Here, the chip of interest may be one of a family of related PCI device chips (e.g., SCSI chips) each characterized by a unique PCI device ID, while the option ROM BIOS chip has a BIOS routine common to the family of chips and includes a plurality of BIOS images, each containing an image PCI device ID corresponding to the unique PCI device ID of an associated one of the chips in the family.
In a first exemplary embodiment of the present invention, there is a first one of the BIOS images which incorporates the common BIOS routine and at least one truncated BIOS image which does not. According to the boot sequence, the chip of interest is initially located. The operation of locating the chip interest includes the steps of initially finding a PCI device chip having an associated option ROM BIOS chip and then determining if the option ROM BIOS chip includes multiple BIOS images. Thereafter, the BIOS images are sequentially scanned until
Adaptec, Inc.
Du Thuan
Lee Thomas
Martine & Penilla LLP
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