Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1993-09-20
1995-04-11
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
3652257, 36523003, 36523006, G11C 700
Patent
active
054065208
ABSTRACT:
In accordance with one embodiment of the invention, an integrated circuit memory capable of receiving address signals has a plurality of array modules. Each array module has a plurality of memory cells arranged in rows and columns and has a means for addressing the rows and columns of the array modules in response to the address signals. The integrated memory includes a circuit for de-coupling an input address signal from array modules and for coupling of a fixed address signal to the array modules, allowing the conversion of the integrated circuit memory to a universal modular memory.
REFERENCES:
patent: 4604730 (1986-08-01), Yoshida et al.
Donaldson Richard L.
Heiting Leon N.
Lindgren Theodore D.
Popek Joseph A.
Texas Instruments Incorporated
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