Electronic digital logic circuitry – Multifunctional or programmable – Array
Reissue Patent
2001-02-20
2004-03-02
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S038000, C326S041000, C326S040000, C326S044000
Reissue Patent
active
RE038451
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates in general to electronic circuits for generation of combinatorial logic. More particularly, this invention relates to a universal logic module for use in programmable logic devices (PLDs).
A logic cell is the fundamental building block of a PLD. Each logic cell typically includes a logic array section to implement combinatorial (“sum of the products”) logic and a register to provide for sequential logic. When combined together in large numbers inside a PLD, they facilitate implementation of complex combinatorial as well as sequential logic. Therefore, versatility and cell size are among the more important considerations in design of logic cells for PLDs.
There exist differing approaches to implementing the combinatorial logic section of a PLD logic cell. One approach employs electrically programmable read only memory (EPROM) elements to implement a programmable AND array that is followed by fixed OR logic. Another method of implementing the programmable combinatorial logic uses look-up tables that can be programmed using random access memory (RAM) cells. Either method requires a number of programmable elements that must be configured for a particular logic function before input variables are applied. Furthermore, existing logic cells tend to be inflexible when implementing frequently occurring specialized functions. For example, two logic cells are required to implement a full adder with carry output using typical existing logic cells.
There is, therefore, room for improvement in methods of implementing combinatorial logic for logic cells in PLDs.
SUMMARY OF THE INVENTION
The present invention provides a small and fast universal logic module (ULM) capable of realizing all Boolean functions of three or fewer variables. The ULM of the present invention further includes a separate output that can realize the carry output of a full adder.
In a preferred embodiment, the present invention provides, in a programmable logic device, a ULM having five input terminals and an output terminal. The ULM includes two 4:1 multiplexers and 2:1 multiplexer. Each 4:1 multiplexer includes 4 data inputs, 2 select inputs and one output. The outputs of the 4:1 multiplexers feed two data inputs of the 2:1 multiplexer, whose output forms the ULM output. The eight data inputs of the two 4:1 multiplexers and their select inputs as well as the select input of the 2:1 multiplexer connect to the five input terminals and their complements. An output of one of the 4:1 multiplexers can be used as a carry output of full adder.
This embodiment of the present invention can realize all Boolean functions of three or fewer variables by assigning the three (or fewer) variables, their complements and the constants 0 and 1 to the five input terminals. Furthermore, this circuit is capable of realizing the carry output of a full adder at a secondary output without any additional circuitry. The ULM, therefore, does not require reconfiguring programmable elements to change its logic functions and is capable of implementing a full adder with carry output. Accordingly, the ULM of the present invention provides a small and versatile combinational circuit for use in PLDs.
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Universal Logic Modules by Harold S. Stone, Chapter IV of Recent Developments in Switching Theory pp. 229-254, by Academic Press (1971).*
“FLEX 8000 Programmable Logic Device Family,” product Data Sheet May 1993, ver. 2, Altera Corporation Altera Corporation 101 Innovation Drive San Jose, CA 95134 (1993).
“FLEX Programmable Logic,” Product Information Bulletin Sep. 1992, ver. 1, Altera Corporation Altera Corporation 101 Innovation Drive San Jose, CA 95134 (1992).
Altera Corporation
Tan Vibol
Townsend and Townsend / and Crew LLP
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