Induced nuclear reactions: processes – systems – and elements – Testing – sensing – measuring – or detecting a fission reactor... – By particular instrumentation circuitry
Patent
1985-03-27
1986-03-04
Kyle, Deborah L.
Induced nuclear reactions: processes, systems, and elements
Testing, sensing, measuring, or detecting a fission reactor...
By particular instrumentation circuitry
376215, 376217, G21C 1700
Patent
active
045740682
ABSTRACT:
A universal logic card is disclosed which contains both pre-programmed functional circuitry for actuating channel logic and dedicated test circuitry for system controller test and for constant and looping interrogation of the pre-programmed channel logic in absence of self-test system controller test. The disclosed card resides as a channel in a self-test system for a nuclear power plant supplementing the nuclear reaction protection system. The card is pre-programmed in digital logic to act equivalent to an analog circuit during actual plant operation. Additionally, the card responds to system controlled surveillance of the nuclear protection system. In system controlled surveillance, a central microprocessor serially addresses system circuit cards such as the one disclosed and loads these cards at predetermined input points with test commands. The addressed cards are thereafter simultaneously activated by a system-wide command. A test pulse, whose duration is so short that it is in effect transparent to the system and therefore cannot cause overall operation, is released. The pulse passes through the pre-programmed channel logic on the universal card along the actual program actuated components to verify, on the real actuating path, the operating integrity of the system. After an appropriate response interval, the output state of the system is recorded in output registers and thereafter read under control from the controller computer memory. Finally, the programmed card in the absence of system-wide test is monitored by a looping secondary computer, which computer reads the card inputs and outputs, verifies the RAM and ROM memories, constantly monitors the system timers, and dependent upon overall state verifies the accuracy of transfer function within the card.
This test circuitry is in effect disabled upon system controller testor only and even remains in operation during actual system manipulation using the programmed digital logic.
REFERENCES:
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patent: 4055801 (1977-10-01), Pike et al.
patent: 4354268 (1982-10-01), Michel et al.
patent: 4434132 (1984-02-01), Cook
IEEE Transactions on Nuclear Science, vol. NS-27, No. 1, Feb. 1980.
Nuclear Energy, 1980, vol. 19, Feb., No. 1, 53-59.
Nuclear Engineering International, Jul. 1982, 41-43.
Apple Christian K.
Hill William D.
Loomis Gary S.
Mercanti, Jr. William A.
General Electric Company
James, Jr. Iver J.
Kyle Deborah L.
Turner Samuel E.
Wendtland Richard W.
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