Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1997-11-25
2000-03-14
Thai, Tuan V.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711100, 36518905, 36523002, 36523006, G06F 1200
Patent
active
060386371
ABSTRACT:
This invention relates to a method and circuit for addressing a symmetric or asymmetric 2.sup.M -element DRAM module using identical circuitry. The method consists of receiving an original address comprising M bits 0 to M-1 identifying a specific memory element, then deriving from these bits a column address and a row address which together identify the specific memory element. The column address comprises N bits 0 to N-1 which match in direct order bits 0 to N-1 of the original address and the row address comprises N bits 0 to N-1 which match in reverse order bits N-2 to M-1 of the original address. A circuit for selectively connecting a set of input address lines to a set of output address lines in a column mapping or a row mapping is also disclosed. The circuit comprises M input address lines 0 to M-1 and N output address lines 0 to N-1. The column mapping associates output address lines 0 to N-1 with input address lines 0 to N-1 in direct order, and the row mapping associates output address lines 0 to N-1 with input address lines N-2 to M-1 in reverse order. The circuit may also comprise a strobe signal for selecting between the column mapping and the row mapping.
REFERENCES:
patent: 5600604 (1997-02-01), Chen
patent: 5802603 (1998-09-01), Bains et al.
patent: 5805854 (1998-09-01), Shigeeda
Berube Jean Luc Joseph
Knight Doug N.
Parfitt Stewart John
Young Dean James
Nortel Networks Corporation
Thai Tuan V.
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