Universal DMA (direct memory access) architecture

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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Reexamination Certificate

active

08032669

ABSTRACT:
A universal DMA (Direct Memory Access) engine can be dynamically configured to function in either a receive or transmit mode. DMAs are logically assembled and bound as needed, without limitation to a fixed, pre-determined number of receive engines and transmit engines. Because a DMA engine may be dynamically assembled to support the flow of data in either direction, varied usage models are enabled, and components used to assemble a receive DMA engine for one application may be subsequently used to assemble a transmit engine for a different application. An application may request a specific number of each type of engine, depending on the nature of its input/output traffic. The number of receive or transmit engines can be dynamically increased or decreased without suspending or rebooting the host. A universal DMA architecture provides a unified software framework, thereby decreasing the complexity of the software and the hardware gate count cost.

REFERENCES:
patent: 5638367 (1997-06-01), Gaytan et al.
patent: 5778180 (1998-07-01), Gentry et al.
patent: 6941390 (2005-09-01), Odom
patent: 7415549 (2008-08-01), Vemula et al.
patent: 2005/0213603 (2005-09-01), Karighattam et al.

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