Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2001-10-31
2002-10-15
Mai, Son (Department: 2818)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S171000, C365S173000, C365S210130
Reexamination Certificate
active
06466475
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a uniform magnetic environment for magnetic memory cells in a Magnetic Random Access Memory. More specifically, the present invention relates to an array of magnetic memory cells in which cells in a perimeter portion of the array experience a magnetic environment that is substantially identical to a magnetic environment experienced by magnetic memory cells in an interior portion of the array.
BACKGROUND OF THE ART
Magnetic Random Access Memory (MRAM) is an emerging technology that can provide an alternative to traditional data storage devices such as fast access semiconductor memories and hard disc drives. For example, MRAM can be used to replace DRAM in a computer. Typically, MRAM comprises an array of magnetic memory cells with each cell in the array storing a bit of data (i.e. information). Each cell in the array comprises several layers of thin films with some of the layers having magnetic properties. One of those layers is a thin magnetic data layer that has an alterable orientation of magnetization. The data layer is designed so that it has two stable and distinct magnetic states. Those stable magnetic states define a binary one (“1”) and a binary zero (“0”). Although the data is stored in a thin magnetic film, each memory cell in the array includes very carefully controlled magnetic, conductive, and dielectric layers.
One prominent type of MRAM cell is a spin tunneling device. The physics of spin tunneling is well understood in the MRAM art. In
FIG. 1
a
, a prior spin tunneling memory cell
101
includes a data layer
102
that stores a bit of data as an alterable orientation of magnetization
103
, a reference layer
104
in which an orientation of magnetization is pinned in a fixed direction
108
, and a thin layer
106
that is positioned between the data layer
102
and the reference layer
104
. The layer
106
is a dielectric layer (also called a tunnel barrier layer) in a tunneling magnetoresistance memory cell (TMR). The layer
106
could equally be a conductive layer in a giant magnetoresistance memory cell (GMR). The thickness of the tunnel barrier layer
106
is usually less than 2.0 nm. Because of shape anisotropy, It is desirable to have a width W and a height H of the prior memory cell
101
result in an aspect ratio (W/H) that is greater than 1.0 so that the alterable orientation of magnetization
103
is aligned with an easy axis e of the memory cell
101
.
The relative orientations
103
and
108
of the data layer
102
and the reference layer
104
define the binary states. For example, in
FIG. 1
b
, a binary one (“1”)is stored in the data layer
102
of the prior memory cell
101
when the pinned orientation
108
and the alterable orientation
103
are parallel to each other (i.e. they point in the same direction). In contrast, a binary zero (“0”) is stored in the data layer
102
of the prior memory cell
101
when the pinned orientation
108
and the alterable orientation.
103
are anti-parallel to each other (i.e. they point in opposite directions). This designation could be reversed. That is, a parallel orientation can be a binary zero (“0”) and an anti-parallel orientation can be a binary one (“1”).
In
FIG. 1
c
, the prior memory cell
101
is positioned intermediate between two conductors (
105
and
107
) that cross the memory cell
101
in an orthogonal direction (i.e. 90 degrees to each other). A row conductor
105
crosses the memory cell
101
along an easy axis (an X-axis in
FIG. 1
c
) and a column conductor
107
crosses the memory cell
101
along a Y-axis. A bit of data is written by generating magnetic fields Hx and Hy with currents ly and lx respectively that are passed through the conductors (
105
,
107
). The magnetic fields (Hx, Hy) interact with the data layer
102
to rotate the alterable orientation of magnetization (denoted as M in
FIG. 1
c
) to a positive orientation (binary (“1”) or a negative orientation (binary (“0”) with respect to the X-axis.
The prior memory cell
101
is typically placed in a large array of identical memory cells. In
FIG. 2
a prior MRAM array
100
includes a plurality of the prior memory cell
101
. Each of the memory cells
101
is positioned between the aforementioned conductors (
105
and
107
). For instance, the conductor
105
can be a word line and the conductor
107
can be a bit line. The memory cells
101
are spaced apart by a predetermined distance &Dgr;x and &Dgr;y along an X direction and a Y direction respectively. A memory cell
101
within the array
100
is selected for a write operation by exciting the word and bit lines that cross the memory cell
101
with a current as illustrated in
FIG. 1
c
so that the combined magnetic fields (Hx and Hy) are sufficient to switch the alterable orientation of magnetization from its present orientation to a new orientation that is indicative of the data desired to be written to the memory cell
101
.
It is desirable to increase the density (i.e. the number of memory cells
101
per unit of area) of the MRAM array
100
. In order to increase the density, it is necessary to reduce the size of the memory cells
101
and to reduce the distance (&Dgr;x and &Dgr;y) between the memory cells
101
so that the MRAM array
100
occupies a smaller footprint due to a reduction in area resulting from the reduced cell size and the reduced distance between cells.
FIG. 2
is a representation of an MRAM array
100
composed of memory cells
101
. This is for illustration purposes, the actual size of the array
100
can be different than shown. In
FIG. 2
, the memory cells
101
are spaced apart by the distance &Dgr;x along the direction of the row conductors
105
and by the distance &Dgr;y along the direction of the column conductors
107
. Each memory cell
101
has a switching field Hc that contributes to a switching characteristic for that cell
101
. That is, the switching characteristic is a magnitude of the combined magnetic fields (Hx and Hy) at which the cell
101
will switch its alterable orientation of magnetization
103
in response to write currents flowing in the row and column conductors (
105
,
107
) that cross the cell
101
. Furthermore, each memory cell
101
comprises a magnetic bit that generates a magnetic field. The combined magnetic fields from all of the memory cells
101
in the array
100
creates a magnetic environment. The magnetic environment experienced by an individual memory cell
101
will depend on the position of that cell
101
within the array
100
. Accordingly, some of the memory cells (denoted
101
i
) have an interior position (see dashed line i) within the array
100
while other memory cells (denoted
101
p
) have a perimeter position within the array
100
(i.e a position that is not within the dashed line i).
One disadvantage of the prior MRAM array
100
is that at a certain point the distances (&Dgr;x and &Dgr;y) between the memory cells
101
becomes small enough such that an individual memory cell
101
is affected by the magnetic environment generated by its neighboring memory cells
101
. This magnetic environment effects the switching characteristics of the individual memory cell
101
. Ideally, it is desirable to have a tight distribution of switching characteristics (i.e. a low&sgr;on the coercivity distribution) among all the memory cells
101
within the array
100
. However, the switching characteristics varies across the array
100
depending on whether or not specific memory cell
101
has the interior position or the perimeter position. This increases the distribution of switching characteristics in the array
100
. The switching characteristics vary because the magnetic environment varies across the array
100
.
In
FIG. 2
, a memory cell
101
i
having the interior position (e.g. at the center of the array
100
) is symmetrically surrounded (see dashed arrows S) by neighboring memory cells. The magnetic environment experienced by the memory cell
101
i
is different than the magnetic environment experienced by memory cells
Denny III Trueman H.
Mai Son
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