Unified memory architecture for recording applications

Details Unified memory architecture for recording applications Unified memory architecture for recording applications

2011-06-14

2011-06-14

Torres, Joseph D (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S785000, C714S755000, C714S756000

Reexamination Certificate

active

07962833

ABSTRACT:
An apparatus comprising a first circuit, a second circuit and a disc. The first circuit may be configured to (i) extract video data as data blocks from an input signal and (ii) perform error correction on the data blocks with a delta syndrome based iterative Reed-Solomon decoding. The second circuit may be configured (i) to decode corrected video data into a video format in a first state, (ii) encode the corrected video data in a second state and (iii) share an external memory between the first circuit and the second circuit. The disc may be configured to store encoded video data in the second state.

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