Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1988-09-07
1990-08-28
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Data refresh
365233, 36523003, G11C 700
Patent
active
049531310
ABSTRACT:
A novel unconditional clock and automatic refresh logic system is provided which comprises a source of unconditional clock pulses coupled to the memory control logic in a manner which permits automatic refreshing of a dynamic memory. There is further provided clock logic means which sense the conditions in the dynamic memory system during which the dynamic memory is not being refreshed. There is further provided, means for generating automatic clock refresh signals coupled to the memory control logic for initiating continuous automatic refresh cycles when the system clock is being shutdown.
REFERENCES:
patent: 4549284 (1985-10-01), Ikuzaki
Byers Larry L.
Purdham David M.
Scheuneman James H.
Sych Terence
Tsang Kwisook
Bowen Glenn W.
Bramson Robert S.
Popek Joseph A.
Sowell John B.
Unisys Corporation
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