Ultrathin oxynitride structure and process for VLSI applications

Details Ultrathin oxynitride structure and process for VLSI applications Ultrathin oxynitride structure and process for VLSI applications

1996-09-05

1999-08-17

Hardy, David B.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257639, 257649, 257760, 438769, H01L 2978

Patent

active

059397632

ABSTRACT:
A process for growing an ultra-thin dielectric layer for use as a MOSFET gate oxide or a tunnel oxide for EEPROM's is described. A silicon oxynitride layer, with peaks in nitrogen concentration at the wafer-oxynitride interface and at the oxynitride surface and with low nitrogen concentration in the oxynitride bulk, is formed by a series of anneals in nitric oxide and nitrous oxide gas. This process provides precise thickness control, improved interface structure, low density of electron traps, and impedes dopant impurity diffusion from/to the dielectric and substrate. The process is easily integrated into existing manufacturing processes, and adds little increased costs.

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