Ultra slim semiconductor package and method of fabricating...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C438S109000

Reexamination Certificate

active

07808095

ABSTRACT:
There is provided an ultra slim semiconductor package comprising: a multilayer thin film layer including at least one or more dielectric layers and at least one or more redistribution layers; at least one semiconductor chip electrically connected to the redistribution layer and mounted on the multilayer thin film layer; conductive structures electrically connected to the redistribution layer and each formed in a post shape at one side of the multilayer thin film layer; a molding part formed on the multilayer thin film layer and at least partially covering the conductive structures and the semiconductor chip; and bumps for external connection formed on the molding part and electrically connected to the conductive structures. The semiconductor package according to the present invention enables mass production at wafer level, is easily stacked between the packages, and has an excellent electrical characteristic. Further, since the package thickness is very thin, the semiconductor package contributes to the slimming of diverse electronic products.

REFERENCES:
patent: 6597070 (2003-07-01), Miyazaki
patent: 2004/0012085 (2004-01-01), Shioga et al.
patent: 2006/0063312 (2006-03-01), Kurita
patent: 2006/0171698 (2006-08-01), Ryu et al.
patent: 2007/0059862 (2007-03-01), Eng et al.
patent: 2008/0136004 (2008-06-01), Yang et al.
patent: 2008/0237834 (2008-10-01), Hu et al.
patent: 1020010002843 (2001-01-01), None
patent: 1020040060843 (2004-07-01), None

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