Ultra-short channel elevated S/D MOSFETS formed on an ultra-thin

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257410, 257639, 257649, 257900, H01L 2712

Patent

active

060607491

ABSTRACT:
The present invention includes a SOI structure formed in a substrate. A gate is formed over the substrate in a recessed portion of a substrate. A first isolation structure is formed on the side walls of the gate. A second isolation structure is formed adjacent to the first isolation structure. Source and drain regions are formed on the SOI structure. Lightly doped drain (LDD) structures are formed adjacent to the source and drain regions, on the SOI structure and under the second isolation structure. A first metal silicide layer is formed on the source and drain regions and a second metal silicide layer is formed on the gate.

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