Ultra-low power basic blocks and their uses

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S357000, C257S364000, C257S365000, C361S056000, C361S058000, C361S091100, C361S111000

Reexamination Certificate

active

06870229

ABSTRACT:
The present invention relates to an ultra-low power (ULP) MOS diode. The diode has a first and a second terminal. It comprises an n-MOS transistor having a channel, a first N+ doped diffusion region at one extremity of the channel and a second N+ diffusion region at the other extremity of the channel, and a p-MOS transistor having a channel and a first P+ doped diffusion region at one extremity of the channel and a second P+ diffusion region at the other extremity of the channel. The first N+ diffusion region of the n-MOS transistor is coupled to the first P+ diffusion region of the p-MOS transistor, the gate of the n-MOS transistor is coupled to the second P+ diffusion region of the p-MOS transistor, and the gate of the p-MOS transistor is coupled to the second N+ diffusion region of the n-MOS transistor. The second P+ diffusion region of the p-MOS transistor is coupled to the first terminal of the diode and the second N+ diffusion region of the n-MOS transistor is coupled to the second terminal of the diode. The diode has a current versus voltage characteristic such that it has a negative slope in a reverse biased state of the diode.

REFERENCES:
patent: 5977594 (1999-11-01), Takao
patent: 6040610 (2000-03-01), Noguchi et al.
patent: 6069782 (2000-05-01), Lien et al.

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