Ultra low dielectric constant integrated circuit system

Details Ultra low dielectric constant integrated circuit system Ultra low dielectric constant integrated circuit system

2007-08-14

2007-08-14

Everhart, Caridad (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C438S623000, C257SE21160

Reexamination Certificate

active

11230985

ABSTRACT:
An integrated circuit is provided including forming a porous ultra-low dielectric constant dielectric layer over a semiconductor substrate and forming an opening in the ultra-low dielectric constant dielectric layer. A dielectric liner is formed to line the opening to cover the pores in the ultra-low dielectric constant dielectric layer and a barrier layer is deposited to line the dielectric liner and conductor core is deposited to fill the opening over the barrier layer.

REFERENCES:
patent: 6759325 (2004-07-01), Raaijmakers et al.
patent: 6800547 (2004-10-01), Lu et al.
patent: 2002/0000670 (2002-01-01), Yau et al.
patent: 2002/0130101 (2002-09-01), Ekkert
patent: 430970 (2001-04-01), None

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