Ultra high voltage MOS transistor device

Details Ultra high voltage MOS transistor device Ultra high voltage MOS transistor device

2008-10-15

2010-06-22

Wojciechowicz, Edward (Department: 2895)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S324000, C257S341000, C257S401000, C257S409000, C257S630000

Reexamination Certificate

active

07741662

ABSTRACT:
An ultra high voltage MOS transistor device includes a substrate; a source region formed in the substrate; a first doping region formed in the substrate and bordering upon the source region; a first ion well encompassing the source region and the first doping region; a gate oxide layer formed on the source region and on the first ion well; a field oxide layer connected with the gate oxide layer and formed on a semiconductor region; a dielectric layer stacked on the field oxide layer; a drain region formed at one side of the field oxide layer and being spaced apart from the source region; a second ion well encompassing the drain region; and a gate disposed on the gate oxide layer and laterally extending to the field oxide layer and onto the dielectric layer.

REFERENCES:
patent: 4290077 (1981-09-01), Ronen
patent: 6306721 (2001-10-01), Teo et al.
patent: 6468837 (2002-10-01), Pendharkar et al.
patent: 6620688 (2003-09-01), Woo et al.
patent: 7456451 (2008-11-01), Kao

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