Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-08-29
2004-06-01
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S291000, C257S347000, C257S222000
Reexamination Certificate
active
06744084
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method and apparatus for resetting a charge collection node of a CMOS imager pixel.
BACKGROUND OF THE INVENTION
CMOS imagers have been increasingly used as low cost imaging devices. A CMOS imager circuit includes a focal plane array of pixel cells, each one of the cells typically including a photodiode for integrating photo-generated charge in the underlying portion of a substrate, a source follower transistor which receives a voltage from the photodiode and provides an output signal, and a reset transistor for resetting the photodiode to a predetermined voltage before a charge integration period. In some implementations a transfer transistor may be used to transfer charge from the photodiode to a diffusion node connected to the source follower transistor.
FIG. 1
illustrates a known three-transistor (3T) pixel cell
20
. As shown in
FIG. 1
, the photocollection region
30
of a photodiode is electrically connected to the gate of a source follower transistor
36
, the output of which is selectively applied to column output line
41
by row select transistor
38
. Reset transistor
32
selectively resets the photocollection region
30
to a predetermined voltage by coupling a voltage Vdd to the photocollection region
30
during a reset period which precedes or follows a charge integration period. A four-transistor (4T) design provides a transfer transistor to switch charge from the photocollection region
30
to the gate of source follower transistor
36
.
While the 3T and 4T pixel cell structures work well, there is an ever increasing desire to minimize the number of transistors used in a pixel to reduce pixel size and increase pixel density in an array. There is also a further desire to simplify overall pixel design and fabrication complexity.
BRIEF SUMMARY OF THE INVENTION
The present invention provides a simplified two-transistor (2T) pixel for a CMOS active pixel imager which omits a conventional reset transistor in favor of a buried reset channel region for resetting a charge collection region of a photodiode. The reset region is provided between a voltage source and a photodiode. Reset is accomplished by applying a pulse voltage to one side of a capacitor, the other side of which is coupled to the reset region which forces charge to be ejected from the photodiode.
REFERENCES:
patent: 5614744 (1997-03-01), Merrill
patent: 6150683 (2000-11-01), Merrill et al.
patent: 6232626 (2001-05-01), Rhodes
patent: 6465846 (2002-10-01), Osanai
patent: 6545302 (2003-04-01), Han
“A 5.5&mgr;m CMOS Image Sensor Cell Utilizing A Buries Reset Channel” by Mabuchi et al, 1997 Symposium on VLS Technology Digest of Technical Papers, pp. 75-76.
Micro Technology Inc.
Nelms David
Nguyen Dao H.
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