Two-transistor dynamic random-access memory cell having a common

Details Two-transistor dynamic random-access memory cell having a common Two-transistor dynamic random-access memory cell having a common

1994-06-23

1995-07-18

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

365149, 365174, 36518903, G11C 700

Patent

active

054348161

ABSTRACT:
A two transistor dynamic random access memory can be treated as a pair of voltage controlled elements which are reversibly controlled in a three step process. In the first step, a capacitance is charged on the controlling terminal of memory transistor. The second step entails isolating the charge on the capacitance of the controlling terminal. The third step entails providing a reversibly controlled voltage on the controlling terminal to further control the two memory transistors without altering the charge of the capacitance. This allows a non-destructive reading of the output of the stored information signal.

REFERENCES:
patent: 3449727 (1969-06-01), Pricer
patent: 3513365 (1970-05-01), Levi
patent: 3634825 (1972-01-01), Levi
patent: 3997881 (1976-12-01), Hoffmann
patent: 4488264 (1984-12-01), Dshkhunian et al.
patent: 4599708 (1986-07-01), Schuster
patent: 4771323 (1988-09-01), Sasaki
patent: 4926378 (1990-05-01), Uchida et al.

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