Two-transistor dynamic random-access memory cell

Details Two-transistor dynamic random-access memory cell Two-transistor dynamic random-access memory cell

1994-06-17

1996-06-11

Zarabian, A.

Static information storage and retrieval

Systems using particular element

Semiconductive

365188, 365149, G11C 1134

Patent

active

055263054

ABSTRACT:
A dynamic random access memory circuit for storing an information signal using both a data input line and a data output line for a two-transistor dynamic ram cell memory circuit is disclosed. The circuit is incorporated into an integrated circuit array of similar cells. Because of the nature of the circuitry, the data input and output lines of each cell in the array are laid out in parallel, and the data-out line of one random access memory cell becomes the data-in line of the adjacent random access memory cell. Thus, while the addition of a separate line for data-in and data-out adds structure to a single cell, it reduces the overall structure of an array of such cells, and results in a more compact construction of a memory array.

REFERENCES:
patent: 3513365 (1970-05-01), Levi
patent: 3634825 (1972-01-01), Levi
patent: 3706079 (1972-12-01), Vadasz et al.

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