Two-terminal semiconductor overcurrent limiter

Details Two-terminal semiconductor overcurrent limiter Two-terminal semiconductor overcurrent limiter

2001-06-20

2002-10-22

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S401000

Reexamination Certificate

active

06469352

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-198415, filed Jun. 30, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a two-terminal semiconductor overcurrent limiter which protects an electric load such as electronic devices from unwanted breakdown even if an overcurrent flows therethrough.
2. Description of the Related Art
For protecting the electric load from the breakdown by the overcurrent flowing therethrough, it has been carried out that a circuit breaker is connected in series with the electric load to break the overcurrent electromechanically. However, after the overcurrent is once broken, the circuit breaker must be operated for restoring it to an original condition. Further, since the circuit breaker is large, it would not be provided in the form of integrated circuits.
For applying such a protection device to an integrated circuit, a semiconductor overcurrent limiter incorporating semiconductor elements has been proposed. In such a semiconductor device, a voltage drop due to the overcurrent is detected, and the overcurrent is broken by a gate voltage when it flows therethrough. As this example, Jpn. Pat. Appln. KOKAI Publication No. 11-97623 Published on Apr. 9, 1999 discloses a protection device for electric overload and a power supply circuit having the protection device. However, the device has a disadvantage such that the overcurrent flows therethrough because it is not instantaneously broken.
Further, the overcurrent protection device having two terminals 31 and 32, disclosed in Jpn. Pat. Appln. KOKAI No. 11-97623, is provided by three MOSFETs
33
to
35
and one zener diode
36
as shown in FIG.
5
. However, since the protection device has a comparatively moderate break characteristic as shown in
FIG. 4
, it can not respond to a rapid change in the overcurrent. Therefore, the device to be protected will be heated and broken.
BRIEF SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a semiconductor overcurrent limiter having two terminals capable of instantaneously breaking an overcurrent flowing through an electric load connected in series therewith.
Another object of the present invention is to provide an integrated semiconductor overcurrent limiter having a high breakdown voltage.
Further object of the present invention is to provide a semiconductor overcurrent limiter for protecting an electric load connected in series therewith when a predetermined current flows therethrough to increase its impedance.
According to one aspect of the present invention, there is provided a two-terminal semiconductor overcurrent limiter, which comprises a semiconductor substrate having first and second surfaces; a vertical MOSFET, provided in the semiconductor substrate, having first source and gate electrodes disposed on the first surface, and a first drain electrode disposed on the second surface to provide a first terminal; a lateral MOSFET, provided in the semiconductor substrate and connected in series with the vertical MOSFET, having second source, drain and gate electrodes disposed on the first surface, and a back gate electrode provided on the second surface in common with the first drain electrode; and a zener diode, provided in the first surface, having an anode electrode connected to the first gate electrode and formed in common with the second drain electrode to provide a second terminal, and a cathode electrode connected to both the second source electrode and the second gate electrode.
In this case, the vertical and lateral MOSFETs having a depletion mode are employed, and the vertical MOSFET has a first conductivity type while the lateral MOSFET has a second conductivity type.
Since the lateral MOSFET has a shallow channel region, a current or overcurrent flowing through the second conductivity type lateral MOSFET is controlled and interrupted due to a voltage drop there across by a voltage applied to the back gate, with the result that a gate voltage of the first conductivity type vertical MOSFET is increased above a threshold voltage, thereby breaking the current flowing therethrough.
The first conductivity type vertical MOSFET is a high voltage MOSFET having a high breakdown voltage to break or interrupt the current. An insulated gate bipolar transistor may also be employed.
The zener diode can be produced at the same time with the lateral MOSFET in the process of making the semiconductor overcurrent limiter. Therefore, the zener diode has a breakdown voltage which is similar to or lower than that of the second conductivity type lateral MOSFET, thereby protecting gate structures of lateral and vertical MOSFETs when a high voltage is applied to the overcurrent limiter.
Still further, according to the overcurrent limiter, two MOSFETs and the zener diode are provided in the semiconductor substrate so that the anode electrode/the back gate electrode and the cathode electrode/anode of the zener diode are formed in common respectively. Therefore, compact overcurrent limiters can be obtained, and the fabrication cost can also be reduced because semiconductor elements are formed by the same diffusion process.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.


REFERENCES:
patent: 4992844 (1991-02-01), Yakushiji
patent: 5304802 (1994-04-01), Kumagai
patent: 5550701 (1996-08-01), Nadd et al.
patent: 5903028 (1999-05-01), Quoirin et al.
patent: 6107664 (2000-08-01), Quoirin et al.
patent: 11-97623 (1999-04-01), None
J.L. Sanchez, Ph. Lecturcq, P. Austin, R. Berriane, M. Breil, C. Anceau and C. Ayela, “Design and fabrication of new high voltage current limiting devices for serial protection applications”. IEEE, 1996, pp. 201-205.
J.L. Sanchez, M. Breil, P. Austin, J.P. Laur, J. Jalade, B. Rousset, H. Foch, “A new high voltage integrated switch: the <<Thyristor Dual>> function”, IEEE, 1999, pp. 157-160.
J.P. Laur, J.L. Sanchez, M. Marmouget, P. Austin, J. Jalade, M. Breil, M. Roy, “A new circuit-breaker integrated device for protection applications”, IEEE, 1999, pp. 315-318.
J.L. Sanchez, P. Austin, R. Berraine, M. Marmouget, “Trends in design and technology for new power integrated devices based on functional integration”, EPE'97, 1997, pp. 1302-1307.

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