Two terminal memory array having reference cells

Static information storage and retrieval – Systems using particular element – Resistive

Reexamination Certificate

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Details

C365S158000

Reexamination Certificate

active

07457147

ABSTRACT:
A memory including reference cells is provided. The memory has address decoding circuitry and an array of memory cells that are non-volatile and re-writable. Each memory cell has a two terminal memory plug that is capable of experiencing a change in resistance. Sensing circuitry compares activated memory cells to a reference level. The reference level is typically generated by at least one reference cell that can be selected at the same time the memory cell is selected.

REFERENCES:
patent: 5909404 (1999-06-01), Schwarz
patent: 7227775 (2007-06-01), Rinerson et al.

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