Two switchable resistive element per cell memory array

Details Two switchable resistive element per cell memory array Two switchable resistive element per cell memory array

1979-10-09

1981-06-09

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Differential sensing

365100, 365182, 365189, G11C 1140

Patent

active

042728339

ABSTRACT:
A memory array wherein each memory cell includes a resistive device which switches from a high to a low resistance state when a potential above its programmable threshold is applied and including a reference cell per word line having a reference switchable resistive device. Using a ramp addressing potential, the array output is disabled by an output disable circuit after a reference resistive device switches which is after the switching of an addressed low threshold resistive device cell and before the switching of an addressed high threshold resistive device cell.

REFERENCES:
patent: 3579204 (1971-05-01), Lincoln

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