Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-02-08
2001-01-23
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S630000, C438S627000, C438S633000, C438S637000, C438S643000, C438S649000, C438S682000, C438S664000
Reexamination Certificate
active
06177338
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to processes used to fabricate semiconductor devices, and more specifically to a process used to create a barrier layer, in a contact hole, prior to a tungsten deposition.
(2) Description of the Prior Art
The major objectives of the semiconductor industry is to continually increase the performance of semiconductor chips, while still reducing the fabrication costs, for these same semiconductor chips. Micro-miniaturization, or the ability to fabricate semiconductor devices, using sub-micron features, has allowed the performance and cost objectives to be successfully addressed. The use of smaller device features result in decreases in performance degrading capacitances. In addition the use of smaller device features result in the attainment of smaller semiconductor chips, still possessing circuit densities previously achieved with larger semiconductor chip counterparts, however enabling more chips to be realized from a specific size, starting substrate, thus reducing the processing cost of a specific chip.
The use of sub-micron features, such as contact holes with diameters less than 0.50 &mgr;m, can however present problems not prevalent with larger diameter contact holes. For example a contact hole opening, in an insulator layer, such as a bit line contact hole to an active device region in the semiconductor substrate, or openings to source/drain regions, of metal oxide semiconductor field effect transistor, (MOSFET), devices, such as static random access memory, (SRAM), or dynamic random access memory, (DRAM), devices, are difficult to successfully fill with an aluminum based layer, obtained via R.F. sputtering, or evaporation procedures. The non-conformality of the deposited aluminum layer, in the narrow diameter contact hole, can result in voids, present at the center of the contact hole, where the non-conformal, depositing layers, of aluminum on the sides of the contact hole did not properly converge. The voids in the aluminum fill can result in yield and reliability failures.
The use of chemically vapor deposited tungsten layers, exhibiting increased conformality, when compared to aluminum based counterparts, has allowed the successful filling of narrow diameter contact holes, to be realized. The use of tungsten filled, contact holes, or tungsten plugs, is characterized by the initial deposition of a titanium—titanium nitride, composite layer, on the walls of the contact hole, prior to tungsten deposition. Titanium offers excellent adhesion to underlying silicon oxide layers, while also supplying the metal, needed to create a metal silicide layer, via use of a subsequent anneal procedure. The metal silicide layer offers improved contact resistance between an overlying tungsten plug structure, in the narrow diameter contact hole, and an underlying active device region. The titanium nitride layer is used as a barrier layer to protect underlying titanium from the attack by the reaction products, generated from the chemical vapor deposition procedure used for deposition of the tungsten layer. However the anneal procedure used to form the metal silicide, the titanium silicide layer in this case, can create cracks or defects in the titanium nitride barrier layer, or in underlying insulator layers, thus reducing the effectiveness of this barrier layer, in protecting underlying materials from the subsequent tungsten deposition. In addition, if left unfilled, the cracks or defects in the titanium nitride barrier layer, and in the underlying insulator layers, would be filled with tungsten, which would be difficult to remove during a subsequent chemical mechanical polishing procedure, thus presenting possible leakage or shorts when subsequent overlying metal structures are formed on an insulator surface, comprised with tungsten filled cracks.
This invention will offer a solution to the unwanted tungsten filling of cracks and defects. After the anneal procedure, used to form the titanium silicide layer from a titanium titanium nitride composite layer, a second titanium nitride layer is deposited, prior to tungsten deposition. The second titanium nitride layer will deposit in any defect, or crack, in the first titanium nitride layer, thus protecting underlying materials from the reaction products of a subsequent tungsten deposition procedure. In addition the second titanium nitride layer will fill defects and cracks, in insulator layers, thus restricting the filling of these defects with tungsten, thus preventing leakage or shorting phenomena, when overlaid with metal structures. Prior art, such as Matsumoto et al. in U.S. Pat. No. 5,654,235, do not use a chemical mechanical polishing procedure to create a tungsten plug, but define a tungsten structure, via photolithographic and reactive ion etching, (RIE), procedures. The RIE procedure may allow any embedded tungsten to be removed, however adding cost and complexity to the fabrication sequence. In addition that prior art consumes the entire thickness of titanium, at the bottom of the contact hole, during formation of a titanium silicide layer, thus not realizing the lower contact resistance offered in this invention in which the titanium silicide layer is directly interfacing an overlying titanium layer.
SUMMARY OF THE INVENTION
It is an object of this invention to create a tungsten plug structure, in a narrow diameter contact hole.
It is another object of this invention to use a composite barrier—adhesive layer, comprised of a first titanium nitride barrier layer, on an underlying titanium adhesive layer, on the walls, as well as at the bottom, of the narrow diameter contact hole.
It is still another object of this invention to deposit a second titanium nitride layer on an underlying first titanium nitride layer, after an anneal procedure, performed to create a titanium silicide layer at the bottom of the narrow diameter contact hole, and prior to tungsten deposition.
In accordance with the present invention a process for forming a tungsten plug structure, in a narrow diameter contact hole, is described, in which a second titanium nitride barrier layer is used to fill defects, created in underlying materials during an anneal cycle, which in turn was used to form a titanium silicide layer at the bottom of the narrow diameter contact hole. After creation of: a gate structure, on an underlying gate insulator layer; a lightly doped source/drain region; insulator spacers on the sides of the gate structure; and a heavily doped source/drain region; a narrow diameter contact hole is opened in an interlevel dielectric, (ILD), layer, exposing a region of the heavily doped source/drain region. A composite layer, comprised of an underlying titanium layer, and an overlying, first titanium nitride layer, is deposited, coating the walls, as well as the bottom, of the narrow diameter contact hole. A rapid thermal anneal, (RTA), procedure is used to form a titanium silicide layer, on the heavily doped source/drain region, at the bottom of the narrow diameter contact hole. A second titanium nitride layer is deposited, overlying the first titanium nitride layer, and filling any defect or crack that may have been created in underlying materials during the RTA procedure. A chemically vapor deposited tungsten layer is next used to completely fill the narrow diameter contact hole, followed by a chemical mechanical polishing procedure, removing tungsten, second titanium nitride, first titanium nitride, and titanium, from the top surface of the ILD layer, resulting in a tungsten plug structure, in a narrow diameter contact hole, embedded in dual titanium nitride barrier layers.
REFERENCES:
patent: 5654235 (1997-08-01), Matsumoto et al.
patent: 5656545 (1997-08-01), Yu
patent: 6057231 (2000-05-01), Givens et al.
Liaw Jhon-Jhy
Yang Ching-Yau
Ackerman Stephen B.
Bowers Charles
Nguyen Thanh
Saile George O.
Taiwan Semiconductor Manufacturing Company
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