Two-stage power noise filter with on and off chip capacitors

Details Two-stage power noise filter with on and off chip capacitors Two-stage power noise filter with on and off chip capacitors

1998-01-29

2000-03-28

Pascal, Robert

Wave transmission lines and networks

Coupling networks

Frequency domain filters utilizing only lumped parameters

333172, 331 17, H03H 706

Patent

active

060437243

ABSTRACT:
Described is a novel implementation of a medium and high frequency on-module (off-chip)/on-chip power noise filter for power noise sensitive circuits. To achieve this, a second order low-pass approach is used. The first stage capacitor is located on-module (off-chip), and the second stage capacitor is implemented on-chip.

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patent: 5854575 (1998-12-01), Fiedler et al.
Baumgartner, S.J., et al., Noise-Insensitive Biasing for Filter to VCO Interface, IBM Technical Disclosure Bulletin, vol. 34, No. 11, Apr., 1992.

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