Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
1999-09-23
2001-08-28
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S058000
Reexamination Certificate
active
06281707
ABSTRACT:
BACKGROUND OF THE INVENTION
A Muller C-element is a standard component in an electronic circuit for detecting when the last of two or more events has occurred. In the simplest form of Muller C-element, the output becomes TRUE (logical high) when all the inputs are TRUE and remains TRUE until all of its inputs are FALSE (logical low).
A Muller C-element is often included in completion detectors for asynchronous systems. The speed of the Muller C-element is an important factor in the overall speed of such systems.
Examples of prior art Muller C elements are shown in FIG.
1
and FIG.
2
. In
FIG. 1
, input A drives two transistors
120
,
130
. Input B drives a transistor
140
in series with transistor
130
, and a transistor
110
in series with transistor
120
. These two pairs of series transistors drive an output line
190
. Back-to-back inverters
170
,
180
serve as a “keeper” to retain the previous value of the output when neither set of series transistors is conducting, as is the case when one input is logical low while the other is logical high. Output line
140
drives a buffer amplifier comprising a first output transistor
150
and a second output transistor
160
; this buffer amplifier produces output C.
In the Muller C-element of
FIG. 2
, there are two series stacks
200
,
202
. The first stack comprises P-type transistors
210
,
220
and N-type transistors
230
,
240
; the second comprises P-type transistors
212
,
222
and N-type transistors
232
,
242
. Each transistor has a gate connected to one of the two inputs A and B. In this circuit, the “keeper” function is obtained with reduced energy consumption by using central transistors
280
,
282
. When inputs A and B differ, one series stack or the other continues to provide a connection between the power supply or ground and the output
290
. Output transistors
250
and
260
function as do their counterparts in FIG.
1
.
The speed of these Muller C-elements is limited because current from the series transistors must be used both to switch on one output transistor and to switch off the other. Furthermore, output C can change only when the newly switched on output transistor begins to deliver more current than is absorbed by the transistor that is switching off. Typically, this occurs at about half the supply voltage. Moreover, during the time that both output transistors are conducting, some “crossover” current flows directly from the power supply to ground through the two output transistors, serving no useful purpose. This crossover current also introduces delay into the circuit.
It is therefore desirable to have a Muller C-element capable of running faster and with less wasted energy.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, a Muller C-element comprises two stages. The first stage consists of a NAND and a NOR gate, each driven by all of the inputs to the Muller C-element. In the second stage, the outputs of the two gates are used separately to switch on and off two output transistors, which drive the output of the Muller C-element A keeper flip flop serves to retain the output value between changes. Because current from each gate is applied only to one output transistor, delay is reduced. Furthermore, an unneeded output transistor is switched off as soon as logically possible, often during the otherwise unused interval while the input values differ, which reduces both delay and crossover current.
According to another aspect of the invention, the NAND and NOR gates each comprise a set of series transistors and a set of parallel transistors which divide the tasks of switching on and switching off the output driver transistors. The series transistors are reserved for the critical function of turning on the output transistors. All other tasks, such as turning of the output driver transistors, are performed by the parallel transistors. Since the sum of the output currents of the parallel transistors is available to switch off the output driver transistors, the parallel transistors can be made narrower than would be usual in ordinary NAND and NOR gates. Such reduced size transistors present a smaller load at the input of the Muller C-element, making it easier to drive and thus resulting in overall higher speed operation.
Other features and advantages of the invention will be apparent in view of the following detailed description and appended drawings.
REFERENCES:
patent: 4697107 (1987-09-01), Haines
patent: 5081374 (1992-01-01), Davis
patent: 5239214 (1993-08-01), Segawa et al.
patent: 6114884 (2000-09-01), Kaplinsky
Chang Daniel D.
Sun Microsystems Inc.
Tokar Michael
Townsend and Townsend / and Crew LLP
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