Two-stage memory cell

Details Two-stage memory cell Two-stage memory cell

2001-05-09

2003-07-01

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000

Reexamination Certificate

active

06587369

ABSTRACT:

TECHNICAL FIELD
The invention relates to memory devices, specifically memory devices using an electric, electronic or electromagnetic memory cell for storing data.
BACKGROUND OF THE INVENTION
A memory cell is a unit of a memory structure capable of holding at least one bit of data. A memory cell may be formed by a wide variety of methods, such as, for example, a breadboard circuit wiring using off the shelf electronic components or semiconductor fabrication.
Memory cells are widely used in computers and other electronic processing devices for temporary storage of data. Oftentimes, memory cells will be used to repeatedly store different data values as the computer or other processing device is calculating various alternatives or seeking to obtain a solution by reviewing all possibilities. Data values determined in the course of such activities are commonly called “speculative” until the data value is determined to be the desired, final or correct result of the process. As used herein, the final data value is called a “permanent” data value. Throughout any specific series of calculations, there may be multiple segments of analysis, each ending with a permanent data value. Permanent data values are not typically stored indefinitely, and are eventually overwritten. However, permanent data values are often retained much longer than any one of the typical series of speculative data values generated during a calculation.
Storing of a permanent data value while proceeding to generate further speculative data values is typically problematic for the conventional memory cell, in which only the last data value stored within the cell can be read. A conventional memory cell can retain only one data value and therefore is unable to retain a permanent data value while simultaneously storing a new speculative data value. Therefore, conventional applications involving storage of speculative data involve an additional memory array, or multiple memory cells within a single array, to store data desired to be retained.
The use of memory cells in the handling of multiple values of speculative data has typically involved extensive hardware, because reading data from a separate array is required prior to writing the data to another array or to manage multiple memory cells for a single desired data value. Specifically, when a determination is made that the presently stored speculative data value is no longer speculative and is desired, or permanent, data, the hardware is called upon to perform multiple memory-management tasks.
SUMMARY OF THE INVENTION
According to one embodiment of the invention, a memory cell is provided having a speculative storage cell adapted to store a speculative data value, a permanent storage cell adapted to store a permanent data value and a transfer assembly, electrically coupled to the permanent storage cell and the speculative storage cell. When the transfer assembly is activated, the speculative data value is written to the permanent storage cell and stored as the permanent data value.
According to another embodiment of the invention, a memory array is provided having an array structure, including a write word line, a write bit line, a read word line and a read bit line. The memory array is also provided with a two-stage memory cell having a speculative storage cell, a permanent storage cell and a transfer assembly. The two-stage memory cell is electrically coupled to the array structure. Activation of the transfer assembly causes a speculative data value stored in the speculative storage node to be written to the permanent storage node.
According to an embodiment of the invention, the present invention simplifies the retention of desired data through the use of a single activation of a transfer line.
According to another embodiment of the invention, a method of operating a memory cell is provided, involving the steps of writing a speculative data value to a speculative storage cell and transferring the speculative data value to a permanent storage cell by a single pulse of a transfer line.


REFERENCES:
patent: 4175290 (1979-11-01), Harari
patent: 4651303 (1987-03-01), Dias et al.
patent: 5856941 (1999-01-01), Keyse et al.
patent: 6173379 (2001-01-01), Poplingher et al.
U.S. patent application Ser. No. 09/852,427, Gold et al., filed May 9, 2001.

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