Two-phase CCD regenerator - I/O circuits

Static information storage and retrieval – Read/write circuit – Data refresh

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307221C, 365 77, 365183, G11C 2100, G11C 700, G11C 1134

Patent

active

041187954

ABSTRACT:
Insulated gate field effect transistor charge regenerator amplifiers respectively cross-couple the output regions of a pair of two-phase CCD structures with the input regions of those structures. Each amplifier senses the level of binary data charge packets from the output region of one of the shift register structures and in response thereto applies a regenerated and inverted binary data charge packet to the input region of the other shift register structure. One of the amplifiers includes logic gating for inputting and outputting data into and from the shift register structure.
A charge regenerator for a two-phase CCD structure comprising first and second shift registers. The charge regenerator comprises a source follower amplifier including a driver transistor, a load transistor and a positive feedback transistor connected between the gate and source of the driver transistor. The gate of the driver transistor is precharged to a predetermined level prior to sensing of the output region charge level and the regenerator inserts into the input region a charge packet corresponding to the data level sensed at the output region, without inversion.

REFERENCES:
patent: 3944990 (1976-03-01), Chou
patent: 3979603 (1976-09-01), Gosney
patent: 3999171 (1976-12-01), Parsons
Engeler et al., A Surface-Charge Random-Access Memory System, IEEE Journal of Solid-State Circuits, vol. SC-7, No. 5, 10/72, pp. 330-335.
Krambeck et al., Implanted-Barrier Two-Phase Charge-Coupled Device, Applied Physics Letters, vol. 19, No. 12, 12/15/71, pp. 520-522.
Lees et al., A Simple Model of a Buried Channel Charge Coupled Device, Solid-State Electronics, vol. 17, pp. 1163-1169.

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