Two level multi-tier system bus

Details Two level multi-tier system bus Two level multi-tier system bus

2007-03-13

2007-03-13

Perveen, Rehana (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

C710S309000, C710S310000

Reexamination Certificate

active

09955961

ABSTRACT:
The present invention is directed to a method and apparatus utilizing a two-level, multi-tier system bus. The multi-tier system bus of the present invention allows for the flow of information to be managed among plural processors by connecting processors within modules on a local bus, which is then connected to the system bus by way of a gateway. A system controller and arbitrator is provided for arbitrating access to the system bus by the various modules. The present invention, by way of the system controller initiates and performs control actions and allows the system bus to be freed from transmission delays of prior approaches associated with transmitting data packets. The present invention accomplishes this by establishing a clear path segment between various modules or devices contained on the system bus, and processors contained within modules located on local buses such that delays associated with transmission of such data packets is greatly reduced, and processing speeds and rates are greatly increased. The present invention also avoids the complications of software arbitration, as all of the arbitration of the present invention is accomplished by hardware.

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