Two-level interrupt service routine

Details Two-level interrupt service routine Two-level interrupt service routine

2006-02-24

2008-09-09

Phan, Raymond N (Department: 2111)

Electrical computers and digital data processing systems: input/

Interrupt processing

Multimode interrupt processing

C710S269000

Reexamination Certificate

active

07424563

ABSTRACT:
A processor provides two-level interrupt servicing. In one embodiment, the processor comprises a storage device and an interrupt handler. The storage device is configured to store an interrupt identifier corresponding to an interrupt request. The interrupt handler is configured to recognize the interrupt request, initiate a common interrupt service routine responsive to recognizing the interrupt request and subsequently initiate an interrupt service routine corresponding to the stored interrupt identifier.

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