Two-layer electrical substrate for optical devices

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation

Reexamination Certificate

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C257S081000, C257S098000, C257S099000, C257S691000, C385S089000, C385S014000, C385S131000

Reexamination Certificate

active

06765275

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to optoelectronic devices, and more specifically to techniques for connecting the optical and electrical device components.
BACKGROUND OF THE INVENTION
Many computer and communication networks being built today, including the Internet, are using fiber optic cabling instead of copper wire. With fiber optic cabling, data is transmitted using light signals, not electrical signals. For example, a logical one may be represented by a light pulse of a specific duration and a logical zero may be represented by the absence of a light pulse for the same duration. The bandwidth of optical fiber is significantly greater than copper since light is attenuated less in fiber than electrons traveling through copper.
While fiber optic cabling is very efficient for transferring data, the use of light signals to process data is still very difficult. For instance, currently there is no efficient way to “store” light signals representative of data. Networks therefore use fiber optics for transmitting data between nodes and silicon chips to process the data within computer nodes. This is accomplished by using fiber optic transceivers, which convert light signals from a fiber optic cable into electrical signals, and vice versa.
FIG. 1
illustrates a perspective view of an exemplary optoelectronic module
100
that can be used to form an optical transceiver.
Optoelectronic module
100
includes a semiconductor chip subassembly (CSA)
102
and an optical subassembly (OSA)
104
. CSA
102
is a packaged semiconductor device. As shown in
FIG. 1
, CSA
102
is a rectangular block of molding material
106
that has electrical contacts
108
exposed through its bottom and side surfaces. Within the block of molding material
106
is an encapsulated semiconductor die that is electrically connected to contacts
108
. For instance, wire bonds can be used for such connections. Another aspect of CSA
102
that cannot be seen is the up-linking contacts on the top surface of CSA
102
. These up-linking contacts are also electrically connected to the encapsulated semiconductor die and therefore provide the electrical communication between the semiconductor die and OSA
104
. The specific CSA
102
that is shown is a leadless leadframe semiconductor package (LLP). However, it should be understood that CSA
102
can be formed of various types of molded packages.
OSA
104
is formed of a backing block
110
, a circuitry substrate
112
, and photonic devices
114
. Backing block
110
has a front surface
116
that supports circuitry substrate
112
and photonic devices
114
, which are attached to circuitry substrate
112
. The backing block
120
can be formed of a variety of materials such as a ceramic material, polyethylene ether ketone (PEEK), or liquid crystal polymer (LCP).
Circuitry substrate
112
is attached to front surface
116
of backing block
110
, wraps around the bottom-front corner of backing block
110
, and covers most of the bottom surface of backing block
110
. Embedded traces within circuitry substrate
112
run from photonic devices
114
on the front surface to the bottom surface of backing block
110
where they make contact with the up-linking contacts of CSA
102
. Typically, size dimensions involved with circuitry substrate
112
are very small and cause the circuit traces to be positioned very close to each other. The small size is advantageous in the same way that small sizes for most electronic devices is advantageous. However, the close proximity of the traces cause the problem of “cross-talk,” especially at high operational frequencies. Cross-talk is the electrical interference between two or more electrically conducting elements. Such cross-talk can drastically reduce the performance of optoelectronic device
100
.
In view of the foregoing, an efficient technique for connecting the photonic devices of an optical device to a semiconductor chip device that exhibits low levels of cross-talk would be desirable.
BRIEF SUMMARY OF THE INVENTION
The present invention is directed to a high performance and small-scale circuitry substrate. The circuitry substrate includes a dielectric layer, a ground layer (also referred to as a return plane) attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. The configuration of the circuitry substrate is designed so that cross-talk is reduced, low levels of ground-bounce and electrical parasitics are exhibited, and optimal impedance levels are obtained. The circuitry substrate can be advantageously used to form an optoelectronic module.
As an apparatus, one embodiment of the present invention includes at least a conductive return plane having a device attachment area, a dielectric layer having a top and a bottom surface, the bottom surface being attached to the return plane, a plurality of signal traces formed on the top surface of the dielectric layer, and a plurality of return paths formed on the top surface of the dielectric layer, each of the return paths wrapping around at least one edge of the dielectric layer and making contact with the return plane. In an alternative embodiment of the apparatus, the return paths wrap around either a top edge, a back edge, or both of the edges in order to make contact with the return plane. In another embodiment of the apparatus, at least one return path extends between each adjacent pair of signal traces, whereby the return paths electrically shield each adjacent pair of signal traces from each other. In yet another embodiment of the invention, the distance between at least two of the signal lines increases as the signal lines extend away from device attachment area. The apparatus of the present invention can be used to connect a photonic device to a semiconductor chip device in order to form an optoelectronic device.
These and other features and advantages of the present invention will be presented in more detail in the following specification of the invention and the accompanying figures, which illustrate by way of example the principles of the invention.


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S. Savastiouk, PH.D., et al. “3-D stacked wafer-level packaging”, Mar. 2000,Advanced Packaging, pp.28-34.
National Semiconductor, “Packaging Databook”,1993 National Semiconductor, pp. v-xi to 1-3 to 1-4, 3-1 to 3-20, 3-30 to 3-31, 3-62 to 3-69. Please note: The year of publication is sufficiently earlier than the effective U.S. filing date so that the particular month of publication is not in issue.

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