Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
2005-12-20
2005-12-20
Tung, Kee M. (Department: 2671)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
C345S543000, C345S545000
Reexamination Certificate
active
06977656
ABSTRACT:
A graphics system stores graphics data in a dynamic-random-access memory (DRAM) and in a faster static random-access memory (SRAM). A refresh controller reads pixel data from a frame buffer that is usually in the faster SRAM, while one or more video overlay engines read graphics objects from the DRAM. However, large frame buffers may be partially stored in the DRAM. Some of the graphics data read by the video overlay engine may reside in the SRAM. A dual-layer arbiter receives requests from the refresh controller and the overlay engines for access to the SRAM and DRAM. When two requestors request the same memory device, the dual-layer arbiter arbitrates access. However, often the requests are to different memory devices and the dual-layer arbiter can pass the requests through without delay, since separate buses to the DRAM and SRAM can be used simultaneously.
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Auvinen Stuart T.
Hsu Joni
NeoMagic Corp.
Tung Kee M.
LandOfFree
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