Two-dimensional execution queue for host adapters

Details Two-dimensional execution queue for host adapters Two-dimensional execution queue for host adapters

2002-11-14

2004-05-25

Gaffin, Jeffrey (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output command process

C710S036000, C710S112000, C711S128000, C712S245000

Reexamination Certificate

active

06742053

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to host adapters that interface two I/O buses, and more particularly, execution queues for host adapters.
2. Description of Related Art
Hardware control blocks, sometimes called sequencer control blocks or SCSI command blocks (SCBs), are typically used for transferring information between a software host adapter device driver in a host computer system
106
and a host adapter integrated circuit
120
that controls operations of one or more peripheral devices. Methods for queuing SCBs are known to those of skill in the art.
For example, see copending and commonly assigned U.S. patent application Ser. No. 07/964,532 entitled “Intelligent SCSI Bus Host Adapter Integrated Circuit,” of Craig A. Stuber et al. filed on Oct. 16, 1992, which is incorporated wherein by reference in its entirety. See also, commonly assigned U.S. Pat. No. 5,625,800 entitled “A Sequencer Control Block Array External To A Host Adapter Integrated Circuit” of Michael D. Brayton et al. filed on Jun. 30, 1994; and also U.S. Pat. No. 5,564,023 entitled “Method for Accessing A Sequencer Control Block By A Host Adapter Integrated Circuit” of B. Arlen Young issued on Oct. 8, 1996, each of which is incorporated herein by reference in its entirety.
A prior art method for queuing SCBs for a system
100
, which included a processor
105
in a host system
106
and a host adapter device
120
with a sequencer
125
, used a one-dimensional linked list SCB queue
160
within a SCB array
155
in random access memory
150
. A device driver executing on microprocessor
105
managed host adapter
120
using SCBs, e.g., hardware control blocks, in SCB queue
160
. Each SCB in SCB queue
160
had a next queue site field Q_NEXT, sometimes referred to as field Q_NEXT, which was used to store a SCB site pointer that addressed the next SCB storage site in SCB queue
160
.
Queue
160
was delimited by head pointer
141
and tail pointer
142
. Head pointer
141
was the number of the site in SCB array
155
storing the SCB to be executed next, and tail pointer
142
was the number of the site in SCB array
155
containing the last SCB transferred from host system
106
. Next queue site field Q_NEXT in the site addressed by tail pointer
142
had an invalid value that was used to identify the SCB as the last in queue
160
in addition to tail pointer
142
.
When queue
160
was empty, head pointer
141
was an invalid value. When a new SCB was transferred from host system
106
to SCB array
155
, head pointer
141
and tail pointer
142
were changed to point to the storage site of the new SCB, i.e., were changed to valid values. Field Q_NEXT in the new SCB was set to an invalid value to indicate that the SCB was the last SCB in queue
160
.
As each new SCB was transferred from host system
106
to SCB array
155
, tail pointer
142
was used to identify the end of queue
160
. Field Q_NEXT in the SCB pointed to by tail pointer
142
was changed to point to the newly transferred SCB, and then tail pointer
142
was changed to point to the storage site of the newly transferred SCB.
A valid head pointer
141
indicated that one or more commands were available for transfer to one or more SCSI targets. The next target selected was specified by information within the SCB addressed by head pointer
141
. Host adapter
120
removed the SCB at the head of queue
160
for execution and selected the specified target. Head pointer
141
was changed to point to the next SCB in queue
160
, i.e., the value in field Q_NEXT of the SCB removed for execution was copied to head pointer
141
. When the selection process was complete, the command contained within the SCB was transferred to the target.
SCBs in array
160
were executed and targets were selected.,in the order that the SCBs were received from host system
106
. This order is shown by the dashed line in FIG.
1
. SCBs were not inserted or removed from the middle of queue
160
.
Other methods are known for queuing SCSI command blocks for a SCSI target. See for example, U.S. Pat. Nos. 5,938,747 and 6,006,292, each of which is incorporated herein by reference. Independent of the method used to manage SCBs in a queue within the SCB array, SCBs are executed and targets are selected in the order that the SCBs were received from host system
106
. SCBs are not inserted into or removed from the middle of the queue within the SCB array.
SUMMARY OF THE INVENTION
According to an embodiment of this invention, a command block execution queue stored in a memory includes a plurality of command blocks in a first linked list, sometimes called a common queue of command blocks. In one embodiment, the first linked list is delimited by a stored head pointer and a stored tail pointer. In another embodiment, only the head pointer is stored.
The command block execution queue further includes: another plurality of command blocks in a second linked list. There is a specific relationship between the first and second linked lists. Specifically, one and only one of the another plurality of command blocks is included in the plurality of command blocks in the first linked list. The second linked list is delimited by only a tail pointer.
This command block execution queue is a target command block execution queue if a host adapter is functioning in an initiator mode. Conversely, this command block execution queue is an initiator command block execution queue if the host adapter is functioning in a target mode. The host adapter can have both a target command block execution queue and an initiator command block execution queue if the host adapter functions in both initiator and target modes.
In another embodiment, the command block execution queue includes a common linked list of command blocks having a common head command block and a common tail command block. A head pointer addresses the common head command block, while a tail pointer addresses the common tail command block. The command block execution queue also includes a target linked list of command blocks having a target head command block and a target tail command block wherein only the target head command block is included in the common linked list of command blocks. Only a target tail pointer to the target tail command block delimits the target linked list.
In another embodiment, a command block execution queue stored in a memory includes a plurality of command blocks in a first linked list. The command block execution queue also includes another plurality of command blocks in a second linked list. Only one of the another plurality of command blocks is included in the plurality of command blocks in the first linked list. Also, the only one of the another plurality of command blocks includes a tail pointer to a last command block in the another plurality of command blocks. The tail pointer is an only delimiter for the second linked list.
This embodiment also includes a head pointer to a head command block in the first linked list. The head pointer is an only delimiter for the first linked list stored in the memory.
In still yet another embodiment, a command block execution queue includes a common linked list of command blocks having.,a common head command block and a common tail command block. A head pointer to the common head command block is stored in a memory. An initiator linked list of command blocks has an initiator head command block and an initiator tail command block. Only the initiator head command block is included in the common linked list of command blocks. The initiator head command block includes a tail pointer to the initiator tail command block.
The common linked list contains a maximum of one command block for an initiator. The initiator linked list contains only command blocks for a single initiator device.
A method of managing a command block execution queue where each command block is associated with one of a plurality of initiator devices determines whether an initiator queue exists for an initiator device specified in a hardware command block. The

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