Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-04-03
2007-04-03
Peugh, Brian R. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S100000, C711S109000, C712S004000, C712S007000
Reexamination Certificate
active
11333574
ABSTRACT:
A data processor comprising: a register memory comprising an array of memory cells extending in two dimensions, the cells being located on rows in the first dimension and columns in the second dimension, each cell being addressable by means of an instruction specifying a pair of coordinates that identify the row and column of the cell in the array; and a processing unit capable of executing instructions that operate on a plurality of memory cells in the register, the instructions identifying the plurality of cells by means of a first instruction part specifying a pair of coordinates that identify a first cell in the array, and a second instruction part that identifies the configuration of the plurality of cells relative to the first cell; the data processor being arranged to interpret a first form of second instruction part as specifying a first group of cells all of which are located in the same row but in different columns, and to interpret a second form of second instruction part as specifying a first group of cells all of which are located in the same column but in different rows.
REFERENCES:
patent: 4287571 (1981-09-01), Chakravarti et al.
patent: 4667308 (1987-05-01), Hayes et al.
patent: 5075889 (1991-12-01), Jousselin et al.
patent: 5313644 (1994-05-01), Matsuo et al.
patent: 5404448 (1995-04-01), Bowen et al.
patent: 5623650 (1997-04-01), Beard et al.
patent: 5696947 (1997-12-01), Johns et al.
patent: 5712500 (1998-01-01), Hsue et al.
patent: 5848020 (1998-12-01), Mori
patent: 6034911 (2000-03-01), Aimoto et al.
patent: 6067632 (2000-05-01), Yamaguchi
patent: 6172687 (2001-01-01), Kitamura et al.
Bailey Neil
Barlow Stephen
Plowman David
Ramsdale Timothy
Swann Robert
Bradley Matthew
Broadcom Corporation
McAndrews Held & Malloy Ltd.
Peugh Brian R.
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