Two bit U-shaped memory structure and method of making the same

Details Two bit U-shaped memory structure and method of making the same Two bit U-shaped memory structure and method of making the same

2008-06-15

2010-02-23

Ha, Nathan W (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE21422

Reexamination Certificate

active

07667262

ABSTRACT:
A memory structure includes: a substrate; a control gate positioned on the substrate; floating gates positioned at two sides of the control gate, wherein the floating gates have a U-shaped bottom embedded in the substrate; a first dielectric layer positioned between the control gate and the substrate; a second dielectric layer positioned between the U-shaped bottom of the floating gates and the substrate; a third dielectric layer positioned between the control gate and the floating gates; a local doping region positioned around the floating gates channel; and a source/drain doping region positioned in the substrate at a side of the floating gates.

REFERENCES:
patent: 6344994 (2002-02-01), Hamilton et al.
patent: 6580117 (2003-06-01), Shimizu
patent: 6713809 (2004-03-01), Ogura et al.
patent: 6787842 (2004-09-01), Hsieh
patent: 6933194 (2005-08-01), Narita et al.
patent: 6940121 (2005-09-01), Gehring
patent: 2008/0003744 (2008-01-01), Lee
patent: 2009/0014773 (2009-01-01), Hsiao et al.

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