Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-01-08
2008-01-08
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185270, C365S185260, C365S185160, C365S185030, C365S185180, C257S324000, C257S321000
Reexamination Certificate
active
07317639
ABSTRACT:
Two-bit programmable nonvolatile memory devices and methods of operating and fabricating the same are provided. The device comprises a plurality of device isolation layers, a plurality of word lines crossing over the device isolation layers, and a multiple insulation layer intervened between the word line and the active region. The multiple insulation layer includes a charge trap insulation layer. A source/drain region is formed at each region defined by adjacent word lines and the adjacent device isolation layers. The source/drain regions have the same surface area. A write operation of the device comprises applying a first level voltage, a ground voltage, and a write voltage to one bit line, another bit line, and a selected word line, thereby writing data into a charge trap insulation layer. By changing the voltages applied to the bit lines, 2 bits may be stored in one memory cell.
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Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
Tran Andrew Q.
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