Turning off clock to flip flops

Details Turning off clock to flip flops Turning off clock to flip flops

2004-12-13

2009-12-08

Lee, Thomas (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S320000, C326S046000, C327S107000, C327S166000

Reexamination Certificate

active

07631209

ABSTRACT:
Exemplary techniques for turning off the clock signal to flip flops are described, which may reduce power consumption by electronic devices. In an implementation, a clock-gating logic turns off the clock signal to a flip flop when a data input of the flip flop remains untoggled. The reduction in power consumption is envisioned to also reduce heat generation.

REFERENCES:
patent: 5498988 (1996-03-01), Reyes et al.
patent: 6204707 (2001-03-01), Hamada et al.
patent: 6630853 (2003-10-01), Hamada
patent: 6828837 (2004-12-01), Ahn

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