Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-01-31
2006-01-31
Baker, Stephen M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S702000
Reexamination Certificate
active
06993699
ABSTRACT:
In an apparatus such as a turbo decoding apparatus in which it is necessary to carry out interleave operation and deinterleave operation, there are provided a memory unit (5) and a memory control unit (12) capable of changing data writing order and data reading order with respect to the memory unit (5) depending on whether data is to be interleaved or deinterleaved. With this arrangement, the single unit of memory (5) can function as an interleaver and a deinterleaver, thereby reducing the size and cost the device.
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Kawabata Kazuo
Nakamura Takaharu
Obuchi Kazuhisa
Yano Tetsuya
Baker Stephen M.
Fujitsu Limited
Katten Muchin & Rosenman LLP
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