Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2011-07-19
2011-07-19
Alphonse, Fritz (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S773000, C714S789000
Reexamination Certificate
active
07984365
ABSTRACT:
An iterative decoding device for a communication receiver includes a decoder for decoding received encoded data blocks by a next iteration initialization, a controller to choose one of the first and second hard decision bits in order for the validity of a CRC field, associated to this received data block, to be checked, and a first memory. The controller, when the CRC field of a block is invalid, orders the decoder to store the final stakes associated to the block in the first memory to require the transmission of a redundant version of the block, and when the redundant version is received, to initialize the decoder with the stored final stakes before it applies the next iteration initialization mechanism to the received redundant version.
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Ancora Andrea
Tomatis Fabrizio
Alphonse Fritz
Hogan & Lovells US LLP
Kubida William J.
Meza Peter J.
ST-Ericsson SA
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