Turbo decoder and iteration stopping method thereof

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Details

C714S786000, C375S341000

Reexamination Certificate

active

07917830

ABSTRACT:
A turbo decoder includes first and second interleavers, a de-interleaver, first and second component decoders and a stop judging circuit. The first and second component decoders respectively decode a systematic code and an interleaved systematic code into first and second extrinsic information. The de-interleaver, the first and second data interleavers respectively process the second extrinsic information, the systematic code and the first extrinsic information into a first a-priori information, an interleaved systematic code and the second a-priori information. The stop judging circuit includes a signal selector, a difference detector and a comparator. The signal selector outputs the first extrinsic information and the first a-priori information or the second extrinsic information and the second a-priori information. The difference detector and comparator respectively get a difference between two output data of the signal selector and output a stopping signal to stop the iteration when the difference is smaller than a threshold value.

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English abstract of CN1996765.

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