Tunneling transistor memory cell

Static information storage and retrieval – Systems using particular element – Negative resistance

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365175, 307286, G11C 1140

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active

043969992

ABSTRACT:
A two state memory cell includes a bipolar transistor and a tunnel diode shunted across the base-collector junction thereof. A constant operating current is established through the transistor and the tunnel diode. The voltage across the tunnel diode may thus be maintained at one of two stable levels, while the bipolar transistor is kept on regardless of the tunnel diode voltage, which determines the ZERO or ONE state of the cell. Since the transistor is not switched on and off when the memory state (corresponding to the two tunnel diode voltage levels) changes, memory cell switching speed is not degraded by transistor switching delay. Moreover, since the current in the tunnel diode is maintained constant, preferably at a value midway between the tunnel diode peak and valley currents, the noise margin of the memory cell is enhanced and the possibility of false switching reduced. The tunnel diode/bipolar transistor combination may be formed on a semiconductor substrate as an integrated structure, thereby providing a high density memory cell.

REFERENCES:
patent: 3943554 (1976-03-01), Russell et al.
IBM Technical Disclosure Bulletin, vol. 23, No. 1, Jun. 1980, pp. 191-193, to C. G. Jambotkar, "Tunnel Diodes as Memory Elements".
IBM Technical Disclosure Bulletin, vol. 23, No. 1, Jun. 1980, pp. 165-166, to W. K. Chu et al., "Tunneling Junction Bipolar Transistors . . . Epi Process".
IBM Technical Disclosure Bulletin, vol. 23, No. 2, Jul. 1980, p. 587 to S. D. Malaviya et al., "Solid-State Epitaxial Process . . . Bipolar Devices".

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