Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2011-04-12
2011-04-12
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S424000, C438S201000, C438S211000, C438S257000, C438S263000, C438S264000
Reexamination Certificate
active
07923364
ABSTRACT:
A method used during semiconductor device fabrication comprises forming at least two types of transistors. A first transistor type may comprise a CMOS transistor comprising gate oxide and having a wide active area and/or a long channel, and the second transistor type may comprise a NAND comprising tunnel oxide and having a narrow active area and/or short gate length. The transistors are exposed to a nitridation ambient. Various process embodiments and completed structures are disclosed.
REFERENCES:
patent: 5661072 (1997-08-01), Jeng
patent: 6734510 (2004-05-01), Forbes et al.
patent: 6875676 (2005-04-01), Wieczorek et al.
patent: 7126181 (2006-10-01), Eppich et al.
patent: 2003/0119255 (2003-06-01), Dong et al.
patent: 2005/0023604 (2005-02-01), Kim et al.
patent: 2006/0014360 (2006-01-01), Matsumoto
patent: 2006/0220171 (2006-10-01), Choi et al.
patent: 2008/0261367 (2008-10-01), Prinz et al.
Chi Suberr
Micro)n Technology, Inc.
Vu David
LandOfFree
Tunnel dielectric comprising nitrogen for use with a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Tunnel dielectric comprising nitrogen for use with a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Tunnel dielectric comprising nitrogen for use with a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2654134