Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2000-05-30
2001-11-13
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
With measuring or testing
C438S016000, C438S636000, C438S313000
Reexamination Certificate
active
06316277
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to wafer defect inspection systems. More particularly, it relates to a method for enhancing the contrast between oxide/substrate and ultra-thin resist on a semiconductor wafer for use with a wafer in deep ultraviolet (DUV) lithography defect inspection system in order to maximize defect inspection sensitivity.
As is generally well-known in the field of fabrication of semiconductor integrated circuits, a series or number of processes are required to be performed during the manufacturing of a semiconductor device. The overall fabrication process involves the patterning of a particular sequence of successive layers which are arranged to form the electrical components of the semiconductor device. The process of forming the integrated circuits on the surface of a single wafer of semiconductor material relies heavily on a “photolithographic or resist process” in which a resist coating is applied to the wafer, the wafer is then exposed, and thereafter the wafer is developed.
In the current state-of-the-art, integrated circuit manufacturers have been using in the resist process a resist coating having a standard photoresist thickness in the range of about 0.5 &mgr;m to 2.0 &mgr;m (5,000 Å-20,000 Å) which is applied to the surface of the silicon wafer. Typically, the wafer has an oxide layer with a standard thickness of about 1600 Å. Thus, during the defect inspection procedure where the wafer with the thicker resist coating thereon is placed into a defect inspection system, there was no difficulty in performing the defect inspection since there was a high contrast between the thicker resist coating and the oxide film thickness which can be optically detected by the defect inspection system. One type of wafer defect inspection system frequently used in the semiconductor industries is referred to as a “Brightfield defect inspection tool.” Such a Brightfield inspection tool is commonly available from KLA-Tencor Corporation of San Jose, Calif., which is designated under their Model No. KLA 2132 for narrow-band illumination or KLA 2138 for broad-band illumination.
However, as advances are being made at the present time in micro-lithographic processing and for the next generation lithography, there will be a trend toward using a resist coating having an ultra-thin resist (UTR) thickness in the regime of around 0.1 &mgr;m (1,000 Å), regardless of utilizing a KrF or ArF resist system. There are two main reasons why very thin resist applications will be required in the future. Firstly, there is a need to provide a greater resolution and to broaden or increase the small depth of focus associated with future exposure lenses (having a higher numerical aperture, shorter wavelength) in order for the lithographic process to be manufacturable. Secondly, there is a limitation on the penetration depth of light into the photoresist film by the resist chemistry (high absorption) at these shorter wavelengths (below 193 nm).
As semiconductor integrated circuit devices are being scaled down to deep submicron dimensions, it is known that defects originating in the micro-lithographic processes can become “killers” of the devices, thereby resulting in yield loss. Thus, a major concern in using ultra-thin resist (UTR) patterns is the existence of defects such as bubbles or pinholes which may damage or destroy the circuit pattern definition and thus will create a device failure or a lower yield level. Therefore, the most essential way of improving the yield is to detect and to monitor the defects in the UTR lithographic processes in order to maintain an acceptable yield level.
However, the defect detection procedure for multi-layer devices is quite difficult. As a result, a short loop defect monitor referred to sometimes as a “Photo Cell Monitor (PCM) or Photo Track Monitor (PTM)” is frequently utilized in the photolithographic area for inspection on the wafer inspection system, such as the KLA 2132 or KLA 2138. Unfortunately, this defect inspection tool being currently used has often encountered difficulties in performing the defect inspection on the UTR wafers. This defect inspection system uses a light source having a wavelength of 546 nm. The inspection difficulty results from the fact of the low contrast between the ultra-thin resist and the oxide film thickness at the inspection wavelength. The contrast is based upon the difference in the reflectivity of the ultra-thin resist and the reflectivity of the adjacent oxide film. These types of Brightfield defect inspection tools use an image subtraction technique where the video image at each pixel is compared to an adjacent pixel and a difference is calculated which is converted to a gray scale in order to detect the defects.
Therefore, it would be desirable to provide a method for enhancing the contrast between the oxide film thickness and the ultra-thin resist in DUV lithography so as to facilitate defect inspection. This is accomplished in one embodiment of the present invention by varying the oxide thickness for a given ultra-thin resist thickness so as to obtain an optimum contrast for a particular metrology or defect inspection system.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a method for enhancing the contrast between oxide film and ultra-thin resist in DTV lithography on a semiconductor wafer.
It is an object of the present invention to provide a method for enhancing the contrast between oxide film and ultra-thin resist in DUV lithography on a semiconductor wafer so as to facilitate defect inspection.
It is another object of the present invention to provide a method for enhancing the contrast between oxide film and ultra-thin resist in DUV lithography with a thickness of less than 0.2 &mgr;m on a semiconductor wafer for use with a defect inspection system in order to maximize defect inspection sensitivity.
It is still another object of the present invention to provide a method for enhancing the contrast between oxide film and ultra-thin resist in DUV lithography on a semiconductor wafer which includes varying the thickness of the oxide for a given fixed resist thickness in order to obtain an optimum contrast therebetween.
In one preferred embodiment of the present invention, there is provided a method for enhancing the contrast between oxide film and ultra-thin resist on a semiconductor wafer in DUV lithography for use with a wafer defect inspection system so as to maximize defect inspection sensitivity. A semiconductor wafer is provided which has a standard oxide thickness and a standard resist thickness. The resist thickness is fixed. The thickness of the oxide is varied in order to obtain a reflectivity of the resist which is different from the reflectivity of the oxide film so as to produce an optimum contrast therebetween.
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Lyons Christopher F.
Nguyen Khanh B.
Phan Khoi A.
Schefske Jeff
Advanced Micro Devices , Inc.
Chin Davis
Luk Olivia T
Niebling John F.
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