Tunable threshold SOI device using isolated well structure for b

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257347, H01L 2712

Patent

active

060722177

ABSTRACT:
To reduce threshold levels in fully depleted SOI devices having back gate wells, the channel regions of the devices are formed of an intrinsic or pseudo-intrinsic semiconductor. Also, multiple well structures or isolation regions are formed below the oxide layer to reduce diode junction leakage between the back gate wells of the devices.

REFERENCES:
patent: 5294821 (1994-03-01), Iwamatsu
patent: 5359219 (1994-10-01), Hwang
patent: 5641980 (1997-06-01), Yamaguchi et al.
patent: 5923067 (1999-07-01), Voldman

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