Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Reexamination Certificate
2007-07-31
2010-02-02
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Having details of setting or programming of interconnections...
C326S037000, C326S039000, C326S041000, C326S021000
Reexamination Certificate
active
07656189
ABSTRACT:
Various approaches for detection of an unwanted function implemented in an integrated circuit (IC) are described. A controller is implemented on the IC, and at a first time while the IC is operating according to a circuit design, the controller reads a first data set from a subset of memory cells. The subset of memory cells stores state information of the circuit design. The controller determines whether the first data set is different from a second data set. In response to the first data set being different from the second data set, the controller outputs a threat signal that indicates the presence of unauthorized logic in the circuit design.
REFERENCES:
patent: 2005/0040844 (2005-02-01), Plants
patent: 2005/0283566 (2005-12-01), Callaghan
XAPP714 (v1.0) Application Note: Virtex-4 Family, Jones,Les, entitled “Single Event Upset (SEU) Detection and Correction”, Mar. 25, 2005, Xilinx, Inc. 2100 Logic Drive, San Jose, CA 95124.
Peterson, W. W. and Brown, D. T. (Jan. 1961). “Cyclic Codes for Error Detection”. Proceedings of the IRE vol. 49, Issue 1, Jan. 1961 pp. 228-235.
Maunu LeRoy D.
Tabler Matthew C
Tan Vibol
XILINX Inc.
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