Tristate buffer having a bipolar transistor

Details Tristate buffer having a bipolar transistor Tristate buffer having a bipolar transistor

1997-05-29

2000-03-14

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326 57, 326110, H03K 190175

Patent

active

060378026

ABSTRACT:
A tristate buffer comprises an output block having a pair of NPN bipolar transistor and nMOS transistor between the source line and ground line and connected to each other at the output terminal of the tristate buffer. The tristate buffer has a base potential control block for discharging the base of the NPN transistor and to couple the base to the output terminal of the tristate buffer during an initial stage of the high-impedance state. After the initial stage of the high-impedance state, the base and output terminal are disconnected from each other. A reverse bias overvoltage occurring in the base-to-emitter P-N junction and a current flow during the high-impedance state are eliminated.

REFERENCES:
patent: 4531068 (1985-07-01), Kraft et al.
patent: 4703203 (1987-10-01), Gallup et al.
patent: 5300829 (1994-04-01), Lev et al.
patent: 5371423 (1994-12-01), Berthold et al.
patent: 5446321 (1995-08-01), Yoshino et al.

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