Tristatable output driver for use with 3.3 or 5 volt CMOS logic

Details Tristatable output driver for use with 3.3 or 5 volt CMOS logic Tristatable output driver for use with 3.3 or 5 volt CMOS logic

1997-05-22

1998-12-15

Santamauro, Jon

Electronic digital logic circuitry

Tri-state

With field-effect transistor

326 81, 326 83, H03K 1900, H03K 190185

Patent

active

058501533

ABSTRACT:
A tri-state output driver comprised of a pair of complementary field effect transistors (CMOS FETs) having sources and drains connected in a series circuit between a voltage rail and ground, apparatus for applying similar logic high and low input signals to respective gates of the FETs whereby an output terminal connected in a circuit between the sources and drains of the FETs is driven toward ground or the voltage rail respectively, or opposite polarity input signals to the gates for causing the FETs to assume a high impedance, and apparatus for maintaining a voltage across the source and drain of the FET which is connected in a circuit between the voltage rail and the output terminal, at less than a lower of an FET threshold of conduction voltage or diode turn-on voltage greater than the voltage of the voltage rail, during the high impedance state, so as to maintain the latter FET in a high impedance state even when a voltage at the output terminal is equal to a voltage which is higher than an FET threshold of conduction or diode turn-on voltage greater than the voltage of the voltage rail.

REFERENCES:
patent: 5399925 (1995-03-01), Nguyen
patent: 5418476 (1995-05-01), Strauss
patent: 5440249 (1995-08-01), Schucket et al.
patent: 5546019 (1996-08-01), Liao
patent: 5587671 (1996-12-01), Zagar et al.
patent: 5631579 (1997-05-01), Miki et al.
patent: 5717342 (1998-02-01), Lofti et al.

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