Tri-state IIL gate

Details Tri-state IIL gate Tri-state IIL gate

1986-02-25

1989-06-20

Miller, S. D.

Static information storage and retrieval

Read/write circuit

For complementary information

307443, 307473, 307475, 307477, 3072963, 365154, H03K 1902, H03K 19092, G11C 1100

Patent

active

048414840

ABSTRACT:
A semiconductor integrated circuit device comprising a logic circuit which is constituted by using tri-state IIL gates. The tri-state IIL gates are particularly arranged to have first and second inputs. If the second input has a first level, the circuit will operate as a normal IIL circuit to provide high and low outputs in response to the first input. However, if the second input has a second level, the circuit will provide a floating output regardless of the first input. The transistors of the IIL circuit can be formed in an island in the substrate, with the potential of the island serving as the second input. In a preferred arrangement, the first level of the second input can be obtained by grounding the island while the second level is obtained by disconnecting the island from ground. These tri-state IIL gates are particularly advantageous to form a transfer gate for an IIL memory similar to the transfer gates used for MOS memories. They can also be used for forming various other logic gate arrangements.

REFERENCES:
patent: 4390802 (1983-06-01), Woltz

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