Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Patent
1997-12-23
1999-12-14
Santamauro, Jon
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
326 17, 326 34, 326121, H03K 19096, H03K 190948
Patent
active
060022728
ABSTRACT:
A domino logic circuit includes a clocked precharge stage coupled to a positive voltage rail with the precharge stage having an input. An evaluation network adapted to receive at least one input is coupled between the precharge stage and a common voltage rail. A static CMOS stage is coupled to the positive voltage rail, and includes an input and an output, the input being coupled to a junction formed by the precharge stage and the evaluation network. A negative voltage rail is coupled to the static CMOS stage to precharge the output negative.
REFERENCES:
patent: 4896057 (1990-01-01), Yang et al.
patent: 5486774 (1996-01-01), Douseki et al.
De Vivek
Somasekhar Dinesh
Intel Corporation
Santamauro Jon
LandOfFree
Tri-rail domino circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Tri-rail domino circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Tri-rail domino circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-866857