Trenched gate non-volatile semiconductor device and method with

Details Trenched gate non-volatile semiconductor device and method with Trenched gate non-volatile semiconductor device and method with

1998-03-30

1999-11-23

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257322, 257335, 257345, 257388, 438211, 438259, 438266, 438270, 438696, H01L 2972

Patent

active

059905158

ABSTRACT:
A non-volatile semiconductor cell structure and method comprises a trenched floating gate, a sidewall doping and a corner doping and further includes a sidewall doped region, a corner doped region, a channel region, and an inter-gate dielectric layer, and a control gate. The trenched floating gate is formed in a trench etched into the semiconductor substrate. In a preferred embodiment, the trenched floating gate has a top surface which is substantially planar with a top surface of the semiconductor substrate. The control gate and the inter-gate dielectric are formed on the top surface of the trenched floating gate. The sidewall doped region and the corner doped region are laterally separated by the trench in which the trenched floating gate is formed. The sidewall doped region has a depth which is greater than the depth of the trench, and the corner doped region has a depth which is less than the depth of the trench. The sidewall doping is a diffusion region formed in the sidewall doped region of the semiconductor substrate and is immediately contiguous to a vertical sidewall of the trench and immediately contiguous to the substrate surface. The corner doping is a diffusion region formed in the corner doped region of the semiconductor substrate and is immediately contiguous the upper vertical sidewall of the trench which is opposite the vertical sidewall along which the sidewall doping is formed and is immediately contiguous the substrate surface.

REFERENCES:
patent: 5770878 (1998-06-01), Beasom

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