Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1996-03-06
1998-10-13
Hardy, David B.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
H01L 2978
Patent
active
058215832
ABSTRACT:
A trenched DMOS transistor has significantly reduced on-resistance. A lightly doped P tub is formed surrounding the P+ body region in order to enhance avalanche breakdown. Thus the epitaxial layer resistivity can be decreased to reduce device on-resistance, while the desired breakdown voltage is also achieved. The on-resistance is further reduced by adding a pre-initial oxidation implant, i.e. phosphorous for an N channel device or boron for a P channel device. This forms a more heavily doped JFET or pinch region at the bottom of the trench and in the upper portion of the drift region. This N JFET region (which is P doped for a P channel device) is more heavily doped than the underlying epitaxial layer and surrounds the trench bottom, thus reducing on-resistance by increasing local doping concentration where otherwise a parasitic JFET would be present.
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Chang Mike F.
Ching Lih-Ying
Hshieh Fwu-Iuan
Tran Hoang
Hardy David B.
Klivans Norman R.
Siliconix incorporated
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