Trench sidewall isolation by polysilicon oxidation

Details Trench sidewall isolation by polysilicon oxidation Trench sidewall isolation by polysilicon oxidation

1986-05-12

1987-05-19

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

148187, 148DIG50, 29576W, 29580, 156646, 156648, 156653, 156657, 1566611, 156662, 357 49, 357 55, 357 59, 427 86, 427 93, H01L 21306, B44C 122, C03C 1500, C03C 2506

Patent

active

046665560

ABSTRACT:
Disclosed is a process of growing a conformal and etch-resistant silicon dioxide on a surface by forming a conformal layer of polysilicon and subjecting the polysilicon to thermal oxidation to completely convert the polysilicon into (poly) silicon oxide.
Disclosed also is a method of forming an isolation trench in a semiconductor substrate having a high integrity oxide sidewall. After forming the trench in the substrate surface using a suitable etch mask and RIE, a single (thermal) oxide or dual (thermal) oxide and (CVD) nitride liner is formed on all trench surfaces. A conformal layer of undoped polysilicon is then formed (by. e.g. LPCVD) on the liner. By subjecting to thermal oxidation, the polysilicon is completely converted into a conformal (poly) silicon oxide layer having a thickness about 2.5 times that of the polysilicon layer. The resulting (poly) silicon oxide has the conformality of CVD oxide and the high etch resistance of thermally grown oxide.
Alternatively, prior to forming the (poly) silicon oxide, the polysilicon layer is removed from the trench floor and the substrate surface in order to limit volume expansion of the polysilicon to a single direction perpendicular to the trench walls.
The trench is filled with oxide, epitaxial silicon, polysilicon, polymers or metal, as desired. For achieving substrate contract through the trench, the trench bottom is opened up by RIE. Polysilicon is deposited with in-situ doping at a high temperature to fill the trench and simultaneously diffuse the dopant from the polysilicon fill into the underlying substrate to form a channel stop.

REFERENCES:
patent: 3966577 (1976-06-01), Hochberg
patent: 4104086 (1978-08-01), Bondur et al.
patent: 4139442 (1979-02-01), Bondur et al.
patent: 4222792 (1980-09-01), Lever et al.
patent: 4238278 (1980-12-01), Antipov
patent: 4256514 (1981-03-01), Pogge
patent: 4356211 (1982-10-01), Riseman
patent: 4509249 (1985-04-01), Goto et al.
patent: 4544576 (1985-10-01), Chu et al.
patent: 4571819 (1986-02-01), Rogers et al.
patent: 4582565 (1986-04-01), Kawakatsu
patent: 4626317 (1986-12-01), Bonn
IBM Technical Disclosure Bulletin, vol. 20, No. 1, Jun. 1977, pp. 144-145, "Recessed Oxide Isolation Process" by S. A. Abbas.
IBM Technical Disclosure Bulletin, vol. 21, No. 4, Sep. 1978, pp. 1466-1467, "Method of Etching/Filling Deep Isolation for Large-Scale Integrated Devices", by J. S. Logan et al.
IBM Technical Disclosure Bulletin, vol. 25, No. 2, Jul. 1982, pp. 588-589, "Post Emitter Polysilicon Trench Isolation", by I. Antipov.
IBM Technical Disclosure Bulletin, vol. 25, No. 5, Oct. 1982, pp. 2288-2291, "Method of Forming Polysilicon-Filled Isolation Regions in an Integrated Circuit Device" by N. G. Anantha et al.

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